Daniel V asked about best practices for designing and manufacturing open source hardware. Rich Felker and Jeff Dionne replied talking about tool flow, I/O devices, and design choices we made in the Turtle prototypes.
Rich Felker asked about reviving support for the Avnet LX9 Microboard, an older FPGA board which some early j-core development was done on. There was some interesting discussion of tools, but the board no longer appears to be widely available.
Cedric Bail asked about framebuffer support, X11, and wayland. Jeff noted the HDMI output in the upcoming turtle boards (and later posted a trivial HDMI test program to show how the signal generation works), and the discussion continued into using DMA for hardware acceleration and framebuffer implementation.
A question about fdpic vs binflt got a response from Rob pointing at Rich's FDPIC toolchain and from Rich describing the internals. (The original posting of the SH uClinux FDPIC ABI is here.)
Jeff answered more questions about j-core ASIC development.
Rob asked about Google Fuchsia (and whether it's relevant to j-core), and poked its developers.
A thread about learning VHDL and the two process design method j-core uses led Geoff to talk about j-core package layout a bit, and post some simulator-based hello world code.
Others had their own suggestions for VHDL tutorials.
Alas, only half the j-core support made it upstream into vanilla this time. The timer and interrupt controller support is still stuck in some reviewer's tree. So it's in, it builds, but hangs during boot.
The ongoing distribution thread is discussing what it would take to configure a little endian j-core.
Meanwhile a second thread started, speculating about a nommu debian port.
J-core support has been merged into the vanilla kernel, and should be in 4.8.
Brian Bartholomew asked about Linux distributions for j-core kicking off a long thread.
Numato sells an ethernet expansion that should work with j-core, if anyone wanted to tweak the VHDL to wire it up.
We've submitted a j-core talk proposal for linuxconf.au.
A thread on what it would take to run Linux on J1 started here and covered things like cache prefetch, cmpxchg implementation, memory model for atomic writes...
Another post explained why the third release should be 62.5 mhz instead of 66.
Rich helped Brian Bartholomew debug a Numato serial port issue so Brian could demo j-core at his local hackerspace.
Update on NVC progress.
Robert and Rich had an exchange about illegal instruction trap behavior in Linux, and Geoff wrote about running Leingen.
Robert put his patches up on github
Robert Ou submitted a pair of patches implementing illegal instruction traps.
Robert Ou got j-core running under myhdl simulation, and found a hardware bug (which is really that j2 is behaving like sh4, not sh2, and which we hadn't previously noticed because gcc doesn't produce that code even when targeting sh2).
Geoff Salmon explained how J-core uses VHDL configurations, and how to reset the CPU, with a follow-up from Jeff about how the boot ROM in the FPGA isn't. Jeff also talked about our VHDL to silicon toolset for an eventual J-core ASIC.
Jeff explained what the v2p tool does (adding a "register" keyword to VHDL).
A thread on the mailing list explained that neither unaligned access or illegal instructions currently generate a trap, because we haven't bothered to implement that yet. (It's not hard, we just need to do it in a way that doesn't impact clock frequency.)
Quick status report on merging vanilla kernel support and status of the Turtle Board.
The J-core engineers got together in Austin, and Rob did a brief writeup.
A thread about using J-core on Kintex 7 led to an explanation of the memory_fpga.vhd module, and later an explanation of the two instr_bus types.
The bug causing timing differences between NVM and GHDL's simulation of J1 running its self-test got fixed, and the NVC maintainer let us post the email thread about it.
Next up is trying to simulate J2 with NVC.
Jeff also posted a diff of J1 against the J2 tree so you can see how this work eventually merges upstream as a configuration option.
Geoff explained how the DDR controller is configured on Numato boards, and updated his previous instructinos about porting J-core to more FPGA boards.
If you'd like to reproduce the new nvc simulator and run the tiny J1 prototype VHDL build, updated instructions are available.
In future, we want to combine this with yosys to produce a fully open source VHDL to FPGA bitstream toolchain, and we're actively working through the issues on the way there.
The NVC maintainer says he has a block of time coming up to work on it, so now is an excellent time to try it out and make suggestions or report bugs.
The simple root filesystme build script is on github now.
The kernel build instructions didn't mention how to get a device tree and install it on your board. (Oops.)
Added J1 to the roadmap, following several days of list discussion.
Christopher Friedt has been updating QEMU towards providing a Numato board emulation capable of running J2's ROM bootloader and vmlinux images.
Since the J2 bootloader starts with CPU instruction verification tests the existing qemu-system-sh4 emulation doesn't pass, he's spending a lot of work Fixing QEMU's superh instruction emulation.
A simple root filesystem build script was posted to the mailing list, along with updated instructions on building the cross compiler and kernel.
The first ten Turtle Board prototypes have arrived in Japan. They are adorable.
They boot Linux with working serial and ethernet. We've also confirmed HDMI output works, but haven't yet done the VHDL for a proper framebuffer the existing kernel drivers can understand.
The USB hub has a wire connected wrong, but that's why we have prototypes. We also need to move three components a milimeter or so to make them fit in the official Raspberry Pi case without filing the edges.
Added a talks page linking to the video of our ELC 2016 J-core design walkthrough talk, and linking to several historical talks.
Added a Roadmap page describing j3 and j4 development plans.
More from the mailing list:
Rich Felker posted his current J-core MimasV2 board support patch, which was reposted as a downloadable attachment with build instructions. (This is a significant improvement over the previous patch: it's less than half the size, much cleaner, converts everything to device tree, adds working sd card support...)
Geoff Salmon described how to modify the VHDL build to serial ports on GPIO pins.
Jeff Dionne posted more information about the DRAM controller.
Rob posted a pointer to MIT Open Courseware's xv6, a tiny educational operating system that looks like an easy port to J-core if somebody's looking for a project.
Several interesting mailing list threads:
This post describes our DRAM controller, the type of memory it uses, our physical memory layout, how much memory the current DRAM controller can use (256 megs), and what would be involved in making it larger.
Another thread covered QEMU support, both using QEMU as-is to run J-Core binaries and modifying QEMU to provide a j-core board emulation.
We reposted Geoff's old GHDL simulator tutorial, which is much easier to use now that GHDL has prebuilt binaries.
J-core received a nice writeup from EE Journal.
(Although to slightly correct it: musl's got threads working fine. That's part of the reason we added a cmpxchg instruction. Traditional sh2 couldn't do modern futex-based thread synchronization properly, but we're fixing things like that as we go.)
We're attempting to organize an Open Hardware track at this year's Linux Plumber's Conference. It's not j-core specific, but many of the j-core developers plan to attend if the track is approved.
If you'd like to attend, or have suggestions for topics we should cover or potential presenters to contact, please edit the proposal's wiki page.
The second source release is now up. Links on the main page have been updated, and direct downloads are available in the downloads directory. See the release announcement on the mailing list for details.
On the mailing list, Christopher Friedt and Trevore Woerner figured out what Ubuntu did wrong that made the Numato bitstream flashing tool unreliable on Ubuntu 14.04, and we've documented how to remove Ubuntu's "any serial device plugged into a modern computer is a modem, so send random AT commands at it" daemon.
The mailing list is live.
Added a navigation bar to the web page, which should make it a bit easier to find this news page. :)
For those of you asking, the Turtle board kickstarter isn't up yet, we're aiming for sometime next month. We'll be adding a turtle page to the nav bar when we have more to say about that.
Slides from our ELC talk are online. Video was recorded but the Linux Foundation usually takes a few weeks to post it on their youtube channel.
Our J-Core design walkthrough talk at ELC went well, Jeff Dionne and Rob Landley spoke to a packed room for an hour, and the video should go up on youtube whenever ELC gets around to processing it.
Here are the slides.
Welcome to the new j-core.org. This site supercedes the old websites (nommu.org/jcore, 0penc0re.org, and 0pf.org) providing a new home for j-core processor development.
Please update your bookmarks accordingly.